The Cooling Moved Inside the Chip

James Carter
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Packaging has quietly become the biggest variable in European data-centre procurement — and most buyers are still writing contracts as if it hadn’t

Weekly Chronicle

The thing that stopped people at Data Centre World in London this March wasn’t a server. It was a cooling pod. Rittal had shipped in a megawatt-class direct-to-chip unit built to service racks pulling up to 250kW, with manifolds, power distribution and plumbing folded into the structure itself. Nineteen thousand people came through the doors over three days. A fair number of them stood in front of that pod doing arithmetic in their heads.

The arithmetic is unforgiving. A conventional rack was designed around five to twelve kilowatts. Air handles that comfortably. Push past roughly twenty and air stops being a cooling strategy and starts being a liability — you are moving enormous volumes of it to shift heat that a few litres of water would carry away without complaint. Water is somewhere in the region of three thousand times better at the job.

Meanwhile the chips keep getting hotter. Leading accelerator TDPs have crossed a thousand watts. Nvidia’s Rubin generation is expected around 1,800W, with Rubin Ultra pencilled in near 3,600W. That is not an incremental step. That is a doubling of the thermal budget per part, roughly every year, and it is the reason a technology that was exotic in 2023 is now simply how you build.

But the interesting part of this story is not that liquid won. Liquid won some time ago. The interesting part is where the engineering fight has relocated.

Down through the packaging stack

A cold plate sits on top of a chip and pulls heat through a thermal interface material, a lid, and whatever else the package puts between the silicon and the coolant. Every one of those layers is resistance. Last September Microsoft went after them directly — etching microscopic channels into the back of the die itself and running coolant through them, at the hotspots, with essentially no distance left to cross.

The lab results were striking: up to three times better heat removal than the cold plates Microsoft currently runs in its own facilities, and a 65% cut in the maximum temperature rise inside a GPU. The channel geometry came out of work with Corintis, a Lausanne startup, which used AI to design a branching pattern that ended up resembling the veins of a leaf. Corintis raised $24m out of stealth on the back of it and is targeting a million cold plates a year.

Whether this scales is a genuinely open question. Etching fluid channels into the back of a die adds process steps, seals and bonding interfaces to a manufacturing flow that already fights for yield. Microsoft has said it is working with fabrication partners on production integration; it has not announced open standards or an ecosystem, which tells you roughly where things stand.

Underneath the die, the same pressure is showing up in the substrate. Ajinomoto build-up film — the organic material the industry has relied on for years — is running out of room as packages get larger and I/O counts climb. Glass is the successor everyone is circling. In January, Intel showed a sample combining its EMIB packaging with a glass core substrate at NEPCON Japan, without the micro-cracking that has dogged the material. SK Absolics is aiming at mass production this year; Samsung and Rapidus are working on glass interposers.

Worth noting, because the marketing rarely does: glass is a decent thermal insulator, with conductivity somewhere between 0.5 and 1.38 W/m·K. It solves warpage, dimensional stability and signal integrity beautifully. It does not, on its own, solve heat. That is precisely why co-packaged cooling and glass substrates are arriving in the same conversation.

Optics is the third front. Nvidia’s co-packaged optics switches — Quantum-X available at the start of this year, Spectrum-X due in the second half — replace pluggable transceivers with silicon photonics on the switch package, and the company claims five times better power efficiency. At the scale of a large GPU cluster, that is tens of megawatts. Not everyone is convinced. SemiAnalysis has put the near-term case rather more bleakly, arguing that scale-out CPO may deliver only single-digit cost and power savings while introducing awkward field servicing and a much larger blast radius when something fails. Broad adoption in scale-up interconnects is generally expected somewhere between 2028 and 2030.

What this does to a purchase order

Here is where it stops being a semiconductor story and becomes a procurement one.

Advanced packaging lead times have gone from an engineering footnote to the gating item. CoWoS and flip-chip formats are running past 52 weeks. ABF substrates and T-glass are in genuine shortage, which means every large-body package with tight warpage requirements is competing for a shrinking allocation. Board complexity has climbed with it: mainstream AI training servers now want 20 to 30 layer HDI boards where 12 to 16 used to do.

Against that, hyperscaler capital expenditure for this year lands somewhere around $660–690bn, roughly three-quarters of it aimed at AI infrastructure. Analysts covering the space have started warning that organisations deferring infrastructure decisions now are looking at eighteen-month slippage in deployment, not eighteen weeks.

For European operators there is a regulatory clock running alongside the commercial one. The EU Energy Efficiency Directive now mandates PUE and Water Usage Effectiveness reporting. Deploying air-cooled infrastructure above 20kW per rack has quietly moved from a question of efficiency to a question of compliance.

A note on the numbers

A word of caution about the figures that circulate in this market, because they circulate freely.

Datum Datacentres reported a 10.2% reduction in total power draw from a move to liquid in a fully optimised facility. Vendor and consultancy material commonly claims 25–30% site energy savings, and some sources go to 30–45%. Lombard Odier cites up to 15%. The IEA’s 4E programme, modelling globally and excluding AI facilities, put optimised immersion at around 34% of consumption.

These are not contradictions so much as different questions. Baseline efficiency, rack density, climate, water availability and whether chillers can actually be downsized all move the answer by tens of percentage points. Any single figure quoted without its facility conditions attached should be treated as marketing until proven otherwise.

The British problem

The UK has the ambition and, for now, not quite the electricity. Government forecasts point to at least 6GW of AI-capable data centre capacity needed by 2030 — the output of four large nuclear reactors. Five AI Growth Zones have been designated, each planning beyond 500MW, with discounted power from April 2027 that the government estimates could save a 500MW site £80m a year and shave five years off a grid connection.

The gap between announcement and concrete is the story. Nearly £10bn of data centres were approved in 2025. Under £1bn actually got built. New housing in west London has been held up because large facilities absorbed the spare grid capacity. Microsoft has warned that some of its UK sites may wait until the mid-2030s for full power.

Which is the argument for taking the packaging story seriously rather than treating it as a component-level curiosity. When power is the binding constraint — and in Britain it is — every watt not spent on cooling is a watt available for compute. Sheffield’s Iceotope, which has been at this since 2005 and now holds well over two hundred granted and pending patents, closed a $26m round in May led by Two Seas Capital and Barclays Climate Ventures, with the British Business Bank among the existing backers. That is not a bet on a better fan.

The uncomfortable conclusion for anyone signing a five-year infrastructure contract this quarter is that the thermal design of hardware that does not yet exist will determine whether the building still works in 2029. Procurement teams have historically bought racks, power and floor space. Increasingly they are buying a thermal envelope — and the people setting its limits are packaging engineers, several tiers up a supply chain most buyers have never had reason to look at.

Weekly Chronicle

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